at Princeton University have developed a new method for repairing and thereby
reducing defects in a patterned nanoscale device by liquifying the patterned
device in the presence of appropriate guiding conditions for a period of time
and then permitting the device to re-solidify.
The performance of such
nanoscale devices typically depends on the shapes and dimensions of their
structures, and they are typically designed with precise shapes and dimensions
to perform a desired function. They are fabricated by one of a variety of
techniques such as lithography, etching, material deposition and imprinting.
However, these fabrication techniques are not precise at the nanoscale level.
They have intrinsic defects due to the statistical nature of each processes and
extrinsic defects due to fabrication environment (such as dust particles).
As a consequence, the devices often deviate from the desired design due to
geometrical (topological) defects, structural defects or both. Typical
geometrical defects include edge roughness, deviation from straight or circular
edges, deviation from planarity and sidewalls that are not vertical. Typical
structural defects include crystal defects, grain boundaries and material
property deterioration. As the size of the devices becomes smaller, these
defects increasingly degrade device performance.
It is anticipated that
this new technology will be useful in the field of high density semiconductor
integrated circuits and in wide variety of electronic, optical, magnetic,
mechanical and biological devices.
Patent protection has been
granted under US # 7,282,456.
For more information please contact:
William H. Gowen
Office of Technology Licensing and Intellectual Property
4 New South Building
Princeton, NJ 08544-0036
(609) 258-1159 fax