Description:
Princeton Docket # 15-3105-1
Researchers at Princeton University, Department of Electrical Engineering, have developed a new cache fill strategy and cache architecture to secure the existing processor cache to prevent information leakage through cache side-channel attacks.
Correctly functioning caches have been shown to leak critical secrets like encryption keys, through various types of cache side-channel attacks. This nullifies the security provided by strong encryption and allows confidentiality breaches, impersonation attacks and fake services. Hence, future cache designs must consider security, ideally without degrading performance and power efficiency. Previous secure cache designs target only contention-based cache side-channel attacks, which cannot defend against reuse-based attacks.
Current processor caches all use demand fetch as their cache fill strategy, which is vulnerable to reuse-based cache side-channel attacks. This invention proposes a novel random fill cache architecture that mitigates reuse-based attacks, and does not degrade performance. It can also be used to reduce cache miss rate and improve performance for the existing processor caches for some special applications.
Applications
• Data protection
• Cache miss rate reduction
• Processor cache performance improvement
Advantages
• Side channel information protection
• Adaptable cache fill policy
• Improved performances for some applications such as streaming
The Faculty Inventor
Ruby B. Lee is the Forrest G. Hamrick Professor in Engineering and Professor of Electrical Engineering at Princeton University, with an affiliated appointment in the Computer Science Department. She is the director of the Princeton Architecture Laboratory for Multimedia and Security (PALMS). Professor Lee is an expert in hardware-enhanced security and has designed architectures for secure processors, secure caches that do not leak information through side-channel attacks, and secure servers for cloud computing. Her research is in the intersection of computer architecture and cyber security. She is a Fellow of the Association for Computing Machinery (ACM) and a Fellow of the Institute of Electrical and Electronic Engineers (IEEE). She holds over 120 U.S. and international patents.
Related Invention:
http://puotl.technologypublisher.com/technology/17447
Intellectual Property & Development status
Patent protection is pending.
Princeton is currently seeking commercial partners for the further development and commercialization of this opportunity.
Contact:
Michael R. Tyerech
Princeton University Office of Technology Licensing • (609) 258-6762• tyerech@princeton.edu
Xin (Shane) Peng
Princeton University Office of Technology Licensing • (609) 258-5579• xinp@princeton.edu